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 FA3675F FA3675F
s Description
FA3675F is a control IC for 6-channel DC-DC converter. This IC can directly drive a Nch/Pch-MOSFET. This IC is suitable to reduce converter size because it has many functions in a small package LQFP-48.
CMOS IC For Switching Power Supply Control
s Dimensions, mm LQFP-48
9.00.3 7.0 1.45 max 0.100.06
25
s Features
* 6-channel PWM control with MOSFET direct driving : 5-channel for Pch-MOSFET, 1channel for Nch-MOSFET * Low input voltage: 2.5V to 20V * 1.0% high accuracy bandgap reference * Low power consumption by means of CDMOS Standby mode: 20A(max.) Operating mode: 10mA(max.) * Soft start function for each channel * ON/OFF function for each channel * Timer latch for short protection * Undervoltage lockout * Wide range of operation frequency: 50kHz to 1MHz * Package: LQFP-48(Thin and small)
37
36
24
9.00.3
8.0
48
1
12
13
7.0
7.8
0.50.2
0.127
0~7
0.05
0.50.1
0.20.06
s Application
* VTR-camera, digital-steel-camera and portable equipment
122
FA3675F
s Block diagram
123
FA3675F
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
Pin symbol
Description Power supply for control circuit Oscillator timing resistor Oscillator timing capacitor Soft start for Ch. 3 & Ch. 4 Soft start for Ch. 6 Soft start for Ch. 5 Soft start for Ch. 1 Soft start for Ch. 2 Reference voltage output Capacitor for reference voltage output Regulated voltage output Ch. 2 inverting input to error amplifier Ch. 2 output of error amplifier Ch. 1 inverting input to error amplifier Ch. 1 output of error amplifier Ch. 5 non-inverting input to error amplifier Ch. 5 inverting input to error amplifier Ch. 5 output of error amplifier Ch. 6 inverting input to error amplifier Ch. 6 output of error amplifier Ch. 3 non-inverting input to error amplifier Ch. 3 inverting input to error amplifier Ch. 3 output of error amplifier Ch. 4 non-inverting input to error amplifier
Pin No. 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
Pin symbol
Description Ch. 4 inverting input to error amplifier Ch. 4 output of error amplifier Timing capacitor for timer latch delay Ground Ch. 3 & Ch. 4 timer latch selection (Low: disable) Ch. 6 ON/OFF function Ch. 5 ON/OFF function Ch. 2 ON/OFF function Ch. 3 & Ch. 4 ON/OFF function Ch. 1 ON/OFF function Power supply for output stage Bias for logic circuit of outputs Power ground Ch. 1 source electrode of output stage Ch. 1 output (for Pch-MOSFET) Ch. 4 output (for Pch-MOSFET) Ch. 3 output (for Pch-MOSFET) Ch. 2 source electrode of output stage Ch. 2 output (for Pch-MOSFET) Ch. 6 source electrode of output stage Ch. 6 output (for Nch-MOSFET) Ch. 5 output (for Pch-MOSFET) Ch. 5 source electrode of output stage Power ground
VCC1 RT CT CS3 CS5 CS4 CS1 CS2 VREF CREF VREG IN2FB2 IN1FB1 IN5+ IN5FB5 IN6FB6 IN3+ IN3FB3 IN4+
IN4FB4 CP GND TLSEL CNT5 CNT4 CNT2 CNT3 CNT1 VCC2 VDRV PGND1 OUT1S OUT1 OUT4 OUT3 OUT2S OUT2 OUT6S OUT6 OUT5 OUT5S PGND2
s Absolute maximum ratings
Item Power supply voltage Source peak current Sink peak current Input voltage for analog input Input voltage for logic input Total power dissipation * Junction temperature Ambient temperature Storage temperature Symbol Rating 20.0 -200 200 -0.3 to +2.5 -0.3 to Vcc +0.5 (Vcc 5.0V) -0.3 to +5.5 (Vcc > 5.0V) 550 125 -20 to +85 -40 to +150 Unit V mA mA V V mW C C C
VCC IOUT IOUT VANA VLOG Pd TJ TOP Tstg
* Ta < 25C s Recommended operating conditions
Item Power supply voltage Input voltage for logic input Oscillation frequency Oscillator timing resistor Oscillator timing capacitor CREF terminal by-pass capacitor Vcc 5.0 Vcc > 5.0 Symbol Min. 2.5 0.0 0.0 50 6.8 22 0.01 Max. 18.0 Vcc +0.25 5.25 1000 100 1000 Unit V V kHz k pF F
VCC VLOG fOSC RT CT CREF
124
FA3675F
s Electrical characteristics (Ta=25C, Vcc1=Vcc2=6V, CT=100pF, RT=10k)
Reference voltage section
Item Output voltage Load regulation Line regulation Output voltage variation due to temperature change Symbol Test condition No load No load to RL=15k Min. 0.99 Typ. 1.00 7 3 0.5 Max. 1.01 15 10 1.0 Unit V mV mV %
VREF VRFLOD VRFLIN VRTa
VCC=2.5 to 18V Ta=-20 to +85C
Regulated voltage section
Item Output voltage Load regulation Line regulation Output voltage variation due to temperature change Symbol Test condition No load No load to RL=3.9k Min. 2.134 Typ. 2.20 2 6 0.5 Max. 2.266 10 20 1.0 Unit V mV mV %
VREG VRG LOD VRG LIN VRGTa
VCC=2.5 to 18V Ta=-20 to +85C
Oscillator section
Item Oscillation frequency Frequency variation due to supply voltage change Frequency variation due to temperature change Symbol Test condition Min. 432 Typ. 480 1 3 7 Max. 528 3 6 14 Unit kHz % %
fOSC fdV fdT
RT=10k, CT=100pF VCC=2.5 to 18V Ta=-20 to +25C Ta=+25 to +85C
Error amplifier section
Item Input offset voltage Input common mode voltage range Open-loop gain Unity-gain bandwidth Output sink current Output source current Symbol Test condition Min. Typ. 2 0.2 70 75 1.0 3.5 -0.18 -0.14 Max. 10 1.5 Unit mV V dB MHz mA mA
VIOF VICOM AVOL fT IFBL IFBH
VFB=VREF +0.05V VFB=VREF -0.05V
2.5
Soft-start circuit section 1 (CS1, CS2, CS3)
Item Input threshold voltage Charge current Symbol Test condition Duty cycle=0% Duty cycle=100% Min. 0.36 1.11 -7.5 Typ. 0.46 1.31 -5.0 Max. 0.56 1.51 -2.5 Unit V V A
VCSO VCS100 ICS
VCS=0V
Soft-start circuit section 2 (CS4, CS5)
Item Input threshold voltage Charge current Symbol Test condition Duty cycle=0% Duty cycle=100% Min. 0.36 1.11 Typ. 0.46 1.31 0 Max. 0.56 1.51 Unit V V A
VCSO VCS100 ICS
125
FA3675F
Short-circuit protection section
Item Threshold voltage at CP Charge current at CP Threshold voltage at error amplifier output Symbol Test condition Min. 1.39 -3.0 1.36 Typ. 1.64 -1.9 1.56 Max. 1.89 -1.0 1.76 Unit V A V
VCPTH ICP VFBTL
ON/OFF logic input section
Item Input voltage for ON mode Symbol Test condition Min. 1.0 1.0 0 Typ. Max. Vcc +0.25 5.25 0.4 V Unit V
VDH
Vcc5.0V Vcc>5.0V
Input voltage for OFF mode
VDL
Undervoltage lockout circuit section
Item OFF to ON threshold voltage Voltage hysteresis Symbol Test condition Min. 1.52 Typ. 1.72 0.1 Max. 1.92 Unit V V
VUVVCC UVCC
Output section 1 (OUT1)
Item L-level ON resistance H-level ON resistance Rise time Fall time Sink current Symbol Test condition Min. Typ. 6 6 30 60 9 12 Max. 10 10 50 85 15 Unit ns ns mA
RONL RONH
tr tf
IO=10mA, OUT1S:GND IO=-10mA, OUT1S:GND CLOAD=1000pF, OUT1S:GND CLOAD=1000pF, OUT1S:GND
OUT1S:RS1=68 to GND
IOUT
Output section 2 (OUT2, OUT5)
Item L-level ON resistance H-level ON resistance Rise time Fall time Sink current Symbol Test condition Min. Typ. 10 10 40 70 8 11 Max. 15 15 60 95 14 Unit ns ns mA
RONL RONH
tr tf
IO=10mA
OUT2S, OUT5S:GND
IO=-10mA
OUT2S, OUT5S:GND
CLOAD=1000pF
OUT2S, OUT5S:GND
CLOAD=1000pF
OUT2S, OUT5S:GND OUT2S, OUT5S: RS2, RS5=68 to GND
IOUT
Output section 3 (OUT3, OUT4)
Item L-level ON resistance H-level ON resistance Rise time Fall time Symbol Test condition Min. Typ. 10 10 40 70 Max. 15 15 60 95 Unit ns ns
RONL RONH
tr tf
IO=10mA IO=-10mA CLOAD=1000pF CLOAD=1000pF
Output section 4 (OUT6)
Item L-level ON resistance H-level ON resistance Rise time Fall time Source current Symbol Test condition Min. Typ. 10 10 40 70 -14 -11 Max. 15 15 60 95 -8 Unit ns ns mA
RONL RONH
tr tf
IO=10mA, OUT6S:VCC2 IO=-10mA, OUT6S:VCC2 CLOAD=1000pF, OUT6S:VCC2 CLOAD=1000pF, OUT6S:VCC2
OUT6S:RS6=330 to VCC2 VCC=7V
IOUT
Overall device
Item Standby current Operating-state supply current Symbol Test condition Duty cycle=0%, RL= Min. Typ. 12 4 Max. 20 6 Unit A mA
ICCO ICC
126
FA3675F
s Characteristic curves (Ta = 25C)
Oscillation frequency (fOSC) vs. timing resistor resistance (RT)
1000 520
Oscillation frequency (fOSC) vs. ambient temperature (Ta)
CT =2
500
9p
fOSC [kHz]
100
50 0p F
10
0p
F
fosc [kHz]
56
F
480
pF
460
440
420
10
10
100
400 20
0
20
40
60
80
100
RT [k]
Ta [C]
Output duty cycle vs. CS terminal voltage (VCS)
100 90 80
Output duty cycle vs. FB terminal voltage (VFB)
100 90 80
Output duty cycle [%]
70 60 50 40 30 20 10 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6
Output duty cycle [%]
70 60 50 40 30 20 10 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6
Vcs [V]
VFB [V]
Reference voltage (VREF) vs ambient temperatare (Ta)
1.06
Supply current (Icc) vs supply voltage (Vcc)
CT=100pF, RT=10k
10 9
1.04
8 7
VREF [V]
Icc [mA]
1.02
6 5 4 3
Du
yc ty c
le 6
0%
1
Duty cycle 0%
Duty cycle 100%
0.98
2 1
0.96 20
0 0 20 40 60 80 100 0 5 10 15 20
Ta [C]
Vcc [V]
127
FA3675F
H-level output voltage (VCC-VOH) vs. output source current (ISOURCE) for OUT1
2.2 2 1.8 1.6
L-level output voltage(VOL) vs. output sink current (ISINK) for OUT1
2.2 2 1.8 1.6 1.4
VCC-VOH [V]
1.4
VOL [V]
1.2 1 0.8 0.6 0.4 0.2 0 0 50 100 150 200
1.2 1 0.8 0.6 0.4 0.2 0 0 50 100 150 200
ISOURCE [mA]
ISINK [mA]
H-level output voltage (VCC-VOH) vs. output source current (ISOURCE) for OUT2, 3, 4, 5, 6
1.8 1.6 1.4
L-level output voltage(VOL) vs. output sink current (ISINK) for OUT2, 3, 4, 5, 6
1.4 1.2 1
1.2
VCC-VOH [V]
1 0.8 0.6
VOL [V]
50 100 150
0.8 0.6
0.4 0.4 0.2 0.2 0 0 0 0 50 100 150
ISOURCE [mA]
ISINK [mA]
Error amplifier voltage gain(Av) / phase() vs. frequency(f)
Condition: Open loop
180 160 140 120 100
AV [dB] [deg]
80 60 40 20 0 -20 -40 -60 10 100 1K 10K 100K 1M 10M Av
f [Hz]
128
FA3675F
s Application circuit
Parts tolerances characteristics are not defined in the circuit design sample shown above. When designing an actual circuit for a product, you must determine parts tolerances and characteristics for safe and economical operation.
129


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